The present invention relates to a control method and apparatus for an information processing system, and more particularly to a method and apparatus for loading microprograms intended for a processing system which adopts the microprogram-based channel control.
This kind of technique is described, for example, in JP-A-59-103151. As described in the above publication, when computer systems grow in scale and the number of channels in connection increases, the internal logical control tends to become more intricate, and the channel control system based on microprogram is employed with the intention of alleviating the complexity. Such a system is operated such that control microprograms are stored in advance in an external secondary storage medium (e.g., floppy disk), the microprograms in the secondary storage medium are loaded into a control storage (referred to simply as CS) under control of a service processor (simply SVP) when the computer is turned on, and once started the microprograms in the control storage are executed sequentially to control channel units.
The above-cited prior art system is designed to speed up the loading by loading microprograms for a plurality of channels simultaneously. However in that system, loading of microprograms into the CS is controlled by the SVP, which is constituted by a general-purpose processor operating at a relatively low processing speed, and therefore even using the above-mentioned technique it takes a lot of loading time, and it is difficult to perform the high-speed channel control.
Moreover, the above-referenced prior art has no consideration for the event of error detection in a microprogram which has been loaded into the CS. In such a case, the slow processing SVP controls to correct the microprogram by rewriting, resulting in a retarded return to the normal processing routine.